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SEMI M50 - Test Method for Determining Capture Rate and False Count Rate for Surface Scanning Inspection Systems by the Overlay Method -
Abstract
This Standard was technically approved by the Silicon Wafer Global Technical Committee. This edition was approved for publication by the global Audits and Reviews Subcommittee on August 31, 2016. Available at www.semiviews.org and www.semi.org in November 2016; originally published November 2001; previously published October 2015.
SEMI M52 defines capture rate (CR) requirements to be met by a scanning surface inspection system (SSIS) to be used for silicon wafers spanning several semiconductor technology generations.
This Test Method covers determination of the CR, the false count rate (FCR) and the cumulative false count rate (CFCR) of an SSIS as a function of the latex sphere equivalent (LSE) size of localized light scatterers (LLSs).
This Test Method addresses calculating and reporting SSIS capture rate from measurements of either PSL depositions or other LLSs on wafers in LSE units.
Two test methods are covered:
Static Method — In which the test is conducted under level 1 variability conditions (without removing the wafer from the stage of the SSIS between scans).
Dynamic Method — In which the test is conducted under level 2 variability conditions (with removing the wafer from and reloading it to the stage of the SSIS between scans).
Specific wafer surfaces (by wafer product, type of film or type of polish) that may affect the measured capture rate and false count rate of an SSIS are to be agreed upon between suppliers and customers.
Referenced SEMI Standards
SEMI E89 — Guide for Measurement System Analysis (MSA)
SEMI M1 — Specification for Polished Single Crystal Silicon Wafers
SEMI M52 — Guide for Specifying Scanning Surface Inspection Systems for Silicon Wafers for the 130 nm to 11 nm Technology Generations
SEMI M53 — Practice for Calibrating Scanning Surface Inspection Systems Using Certified Depositions of Monodisperse Reference Spheres on Unpatterned Semiconductor Wafer Surfaces
SEMI M59 — Terminology for Silicon Technology
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