SEMI 3D5 - Guide for Metrology Techniques to be Used in Measurement of Geometrical Parameters of Through-Silicon Vias (TSVs) in 3DS-IC Structures -

Abstract

This Guide will assist the user in selection and use of tools for performing measurements of geometrical parameters of an individual TSV (through-silicon via), or of an array of TSVs. TSVs are expected to be a critical element in future three-dimensional stacked integrated circuit (3DS-IC) packaging. Advanced TSV designs with higher aspect ratios and smaller diameters may challenge TSV metrology techniques. This Guide will address the various metrology techniques that are currently available that enable TSV (through-silicon via) dimensional measurements. This Guide can also assist producers and users of TSV metrology to develop products and conduct meaningful evaluations.

　

This Guide focuses on the geometrical parameters of the openings (i.e., holes) in thin silicon slices, within which the conductive vias will be constructed. Additional layers on the surface of the silicon wafer, such as a hard mask, may be present; such layers may affect the performance of the metrology tools described below.

　

A complete TSV will typically require additional components, for example, a conductive material and insulating layers. The measurement tools described in this Guide represent the present state of the art for measurements of the TSV opening. Some of them may be applicable to other TSV features that become present at a later stage of manufacture, while others may not.

　

This Guide will assist the user in selection and use of TSV metrology tools, as well as a protocol for performing TSV measurements of geometrical parameters of an individual TSV, or of an array of TSVs, such as pitch, top CD, top diameter, top area, depth, taper (or sidewall angle), bottom area, bottom CD, bottom diameter, and possibly others (e.g., scalloping and overall tilt). Figure 1 shows some of these.

　

This Guide will provide examples of measurements of TSVs at different sizes and aspect ratios, TSV measurement using a variety of metrology tools, the relative levels of substrate interaction, and recommendations by application. It targets the particular set of geometrical parameters defined in SEMI 3D1. It focuses on the various measurement principles available, rather than on particular instruments.

　

The examples given have been provided by qualified industry colleagues, and are believed to be representative of instrument performance that can be routinely achieved. Substantial efforts have been made to obtain performance data that are representative of the marketplace in 2012. However, this Guide is not an exhaustive survey of the state of the art of TSV geometrical metrology.

　

The TSV measurements described in this Guide extend over TSV diameters from a few micrometers up to tens and even hundreds of micrometers, and TSV depths in the range of 10 to 200 µm.

　

Company names, brand names, and trademarks of individual instruments are not included in this Guide.

　

Referenced SEMI Standards

SEMI 3D1 — Terminology for Through Silicon via Metrology
SEMI M59 — Terminology for Silicon Technology
SEMI MF1530 — Test Method for Measuring Flatness, Thickness, and Total Thickness Variation on Silicon Wafers by Automated Noncontact Scanning

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