{"product_id":"m06200-semi-m62-シリコンエピタキシャルウェーハの仕様","title":"M06200 - SEMI M62 - シリコンエピタキシャルウェーハの仕様","description":"\u003cp class=\"Indent\" style=\"MARGIN: 0in 21pt 0pt\"\u003e\u003cfont size=\"2\"\u003e\u003cspan style=\"FONT-FAMILY: 'MS PMincho'; mso-ascii-font-family: 'Times New Roman'; mso-hansi-font-family: 'Times New Roman'\"\u003e本スタンダードは，global Silicon Wafer Committee\u003cspan style=\"FONT-FAMILY: 'MS PMincho'; mso-ascii-font-family: 'Times New Roman'; mso-hansi-font-family: 'Times New Roman'\"\u003eで技術的に承認されている。現版は2009\u003cspan style=\"FONT-FAMILY: 'MS PMincho'; mso-ascii-font-family: 'Times New Roman'; mso-hansi-font-family: 'Times New Roman'\"\u003e年1\u003cspan style=\"FONT-FAMILY: 'MS PMincho'; mso-ascii-font-family: 'Times New Roman'; mso-hansi-font-family: 'Times New Roman'\"\u003e月2\u003cspan style=\"FONT-FAMILY: 'MS PMincho'; mso-ascii-font-family: 'Times New Roman'; mso-hansi-font-family: 'Times New Roman'\"\u003e日，global Audits and Reviews Subcommittee\u003cspan style=\"FONT-FAMILY: 'MS PMincho'; mso-ascii-font-family: 'Times New Roman'; mso-hansi-font-family: 'Times New Roman'\"\u003eにて発行が承認された。2009\u003cspan style=\"FONT-FAMILY: 'MS PMincho'; mso-ascii-font-family: 'Times New Roman'; mso-hansi-font-family: 'Times New Roman'\"\u003e年2\u003cspan style=\"FONT-FAMILY: 'MS PMincho'; mso-ascii-font-family: 'Times New Roman'; mso-hansi-font-family: 'Times New Roman'\"\u003e月にwww.semi.org\u003cspan style=\"FONT-FAMILY: 'MS PMincho'; mso-ascii-font-family: 'Times New Roman'; mso-hansi-font-family: 'Times New Roman'\"\u003eで，そして2009\u003cspan style=\"FONT-FAMILY: 'MS PMincho'; mso-ascii-font-family: 'Times New Roman'; mso-hansi-font-family: 'Times New Roman'\"\u003e年3\u003cspan style=\"FONT-FAMILY: 'MS PMincho'; mso-ascii-font-family: 'Times New Roman'; mso-hansi-font-family: 'Times New Roman'\"\u003e月にCD-ROM\u003cspan style=\"FONT-FAMILY: 'MS PMincho'; mso-ascii-font-family: 'Times New Roman'; mso-hansi-font-family: 'Times New Roman'\"\u003eで入手可能となる。初版は2005\u003cspan style=\"FONT-FAMILY: 'MS PMincho'; mso-ascii-font-family: 'Times New Roman'; mso-hansi-font-family: 'Times New Roman'\"\u003e年11\u003cspan style=\"FONT-FAMILY: 'MS PMincho'; mso-ascii-font-family: 'Times New Roman'; mso-hansi-font-family: 'Times New Roman'\"\u003e月発行，前版は2007\u003cspan style=\"FONT-FAMILY: 'MS PMincho'; mso-ascii-font-family: 'Times New Roman'; mso-hansi-font-family: 'Times New Roman'\"\u003e年11\u003cspan style=\"FONT-FAMILY: 'MS PMincho'; mso-ascii-font-family: 'Times New Roman'; mso-hansi-font-family: 'Times New Roman'\"\u003e月に発行された。\u003c\/span\u003e\u003c\/span\u003e\u003c\/span\u003e\u003c\/span\u003e\u003c\/span\u003e\u003c\/span\u003e\u003c\/span\u003e\u003c\/span\u003e\u003c\/span\u003e\u003c\/span\u003e\u003c\/span\u003e\u003c\/span\u003e\u003c\/span\u003e\u003c\/span\u003e\u003c\/span\u003e\u003c\/span\u003e\u003c\/font\u003e\u003c\/p\u003e \u003cp class=\"Indent\" style=\"MARGIN: 0in 21pt 0pt\"\u003e\u003cfont size=\"2\"\u003e\u003cspan style=\"FONT-FAMILY: 'MS PMincho'; mso-ascii-font-family: 'Times New Roman'; mso-hansi-font-family: 'Times New Roman'\"\u003e\u003co:p\u003e\u003c\/o:p\u003e \u003c\/span\u003e\u003c\/font\u003e\u003c\/p\u003e \u003ch2 style=\"MARGIN: auto 0in\"\u003e\u003cspan lang=\"JA\" style=\"FONT-WEIGHT: normal; FONT-SIZE: 9pt; FONT-FAMILY: 'MS PMincho'; mso-ascii-font-family: 'Times New Roman'; mso-hansi-font-family: 'Times New Roman'; mso-fareast-language: JA; mso-bidi-font-weight: bold\"\u003eエピタキシャルシリコンウェーハは，多くの集積回路やディスクリート半導体デバイスに使用されている。共通のプロセス装置を複数のデバイス製造ラインで使用できるようにするためには，エピタキシャルウェーハの寸法を標準化することが不可欠である。\u003c\/span\u003e\u003c\/h2\u003e \u003ch2 style=\"MARGIN: auto 0in\"\u003e\u003cspan lang=\"JA\" style=\"FONT-WEIGHT: normal; FONT-SIZE: 9pt; FONT-FAMILY: 'MS PMincho'; mso-ascii-font-family: 'Times New Roman'; mso-hansi-font-family: 'Times New Roman'; mso-fareast-language: JA; mso-bidi-font-weight: bold\"\u003e\u003cspan style=\"FONT-WEIGHT: normal; FONT-SIZE: 9pt; mso-fareast-language: JA; mso-bidi-font-weight: bold\"\u003e\u003co:p\u003e\u003c\/o:p\u003e \u003c\/span\u003e\u003c\/span\u003e\u003c\/h2\u003e \u003ch2 style=\"MARGIN: auto 0in\"\u003e\u003cspan lang=\"JA\" style=\"FONT-WEIGHT: normal; FONT-SIZE: 9pt; FONT-FAMILY: 'MS PMincho'; mso-ascii-font-family: 'Times New Roman'; mso-hansi-font-family: 'Times New Roman'; mso-fareast-language: JA; mso-bidi-font-weight: bold\"\u003eさらに，高密度の集積回路のエレメントの寸法をますます小さくするためのテクノロジの進歩につれ，エピタキシャルウェーハの特性をさらに標準化することに関心が集まってきている。\u003c\/span\u003e\u003c\/h2\u003e \u003ch2 style=\"MARGIN: auto 0in\"\u003e\u003cspan lang=\"JA\" style=\"FONT-WEIGHT: normal; FONT-SIZE: 9pt; FONT-FAMILY: 'MS PMincho'; mso-ascii-font-family: 'Times New Roman'; mso-hansi-font-family: 'Times New Roman'; mso-fareast-language: JA; mso-bidi-font-weight: bold\"\u003e\u003cspan style=\"FONT-WEIGHT: normal; FONT-SIZE: 9pt; mso-fareast-language: JA; mso-bidi-font-weight: bold\"\u003e\u003co:p\u003e\u003c\/o:p\u003e \u003c\/span\u003e\u003c\/span\u003e\u003c\/h2\u003e \u003ch2 style=\"MARGIN: auto 0in\"\u003e\u003cspan lang=\"JA\" style=\"FONT-WEIGHT: normal; FONT-SIZE: 9pt; FONT-FAMILY: 'MS PMincho'; mso-ascii-font-family: 'Times New Roman'; mso-hansi-font-family: 'Times New Roman'; mso-fareast-language: JA; mso-bidi-font-weight: bold\"\u003eこれらの仕様では，ディスクリート半導体デバイスの製造業者および集積回路デバイスの製造業者の両者のためのシリコンエピタキシャルウェーハの例を定義し，記載する。検査手順および検収判定基準を定義することにより，サプライヤとその顧客は両者とも製品の特性と品質の要求条件を変わりなく定義できる。\u003cspan style=\"FONT-WEIGHT: normal; FONT-SIZE: 9pt; mso-fareast-language: JA; mso-bidi-font-weight: bold\"\u003e\u003co:p\u003e\u003c\/o:p\u003e\u003c\/span\u003e\u003c\/span\u003e\u003c\/h2\u003e\u003cp dir=\"ltr\" align=\"justify\"\u003e \u003c\/p\u003e\u003cb\u003eReferenced SEMI Standards\u003c\/b\u003e\u003cbr\u003e\u003cp\u003e\u003cfont\u003eSEMI M1 — Specifications for Polished Monocrystalline Silicon Wafers\u003cbr\u003eSEMI M17 — Guide for a Universal Wafer Grid\u003cbr\u003eSEMI M18 — Guider for Developing Specification Forms for Order Entry of Silicon Wafers\u003cbr\u003eSEMI M33 — Test Method for the Determination of Residual Surface Contamination on Silicon Wafers by Means of Total Reflection X-Ray Fluorescence Spectroscopy (TXRF)\u003cbr\u003eSEMI M35 — Guide for Developing Specifications for Silicon Wafer Surface Features Detected by Automated Inspection\u003cbr\u003eSEMI M43 — Guide for Reporting Wafer Nanotopography\u003cbr\u003eSEMI M44 — Guide for Conversion Factors for Interstitial Oxygen in Silicon\u003cbr\u003eSEMI M45 — Provisional Specification for 300-mm Wafer Shipping System\u003cbr\u003eSEMI M53 — Practice for Calibrating Scanning Surface Inspection Systems Using Depositions of Monodisperse Polystyrene Latex Sphere on Unpatterned Semiconductor Wafer Surfaces\u003cbr\u003eSEMI M59 — Terminology for Silicon Technology\u003cbr\u003eSEMI MF95 — Test Method for Thickness of Epitaxial Layers of Silicon on Substrates of the Same Type by Infrared Reflectance\u003cbr\u003eSEMI MF110 — Test Method for Thickness of Epitaxial or Diffused Layers in Silicon by the Angle Lapping and Staining Technique\u003cbr\u003eSEMI MF154 — Guide for Identification of Structures and Contaminants Seen on Specular Silicon Surfaces\u003cbr\u003eSEMI MF374 — Test Method for Sheet Resistance of Silicon Epitaxial Layers Using an Inline Four-Point Probe with the Single Configuration \u003cbr\u003eSEMI MF398 — Test Method for Majority Carrier Concentration in Semiconductors by Measurement of Wavelength of the Plasma Resonance Minimum\u003cbr\u003eSEMI MF523 — Practice for Unaided Visual Inspection of Polished Silicon Slices\u003cbr\u003eSEMI MF525 — Measuring Resistivity of Silicon Wafers Using a Spreading Resistance Probe\u003cbr\u003eSEMI MF534 — Test Method for Bow of Silicon Wafers\u003cbr\u003eSEMI MF657 — Test Method for Measuring Warp and Total Thickness Variation on Silicon Wafers by Noncontact Scanning\u003cbr\u003eSEMI MF672 — Test Method for Measuring Resistivity Profiles Perpendicular to the Surface of a Silicon Wafer Using a Spreading Resistance Probe\u003cbr\u003eSEMI MF723 — Practice for Conversion between Resistivity and Dopant Density for Boron-Doped and Phosphorus-Doped Silicon\u003cbr\u003eSEMI MF1390 — Test Method for Measuring Warp on Silicon Wafers by Automated Non-contact Scanning\u003cbr\u003eSEMI MF1392 — Test Method for Determining Net Carrier Density Profiles in Silicon Wafers by Capacitance-Voltage Measurements with a Mercury Probe\u003cbr\u003eSEMI MF1451 — Test Method for Measuring Sori on Silicon Wafers by Automated Non-contact Scanning\u003cbr\u003eSEMI MF1530 — Test Method for Measuring Flatness, Thickness, and Total Thickness Variation on Silicon Wafers by Automated Non-contact Scanning\u003cbr\u003eSEMI MF1617 — Test Method for Measuring Surface Sodium, Aluminum, Potassium, and Iron on Silicon and Epi Substrates by Secondary Ion Mass Spectrometry\u003cbr\u003eSEMI MF1726 — Practice for Analysis of Crystallographic Perfection of Silicon Wafers\u003cbr\u003eSEMI T3 — Specification for Wafer Box Labels \u003cbr\u003e\u003c\/font\u003e\u003c\/p\u003e","brand":"semi.org","offers":[{"title":"SEMI M62-0413 - Superseded","offer_id":40234363781187,"sku":"9703","price":38100.0,"currency_code":"JPY","in_stock":true},{"title":"SEMI M62-0912 - Superseded","offer_id":40234363846723,"sku":"9709","price":38100.0,"currency_code":"JPY","in_stock":true},{"title":"SEMI M62-0712 - Superseded","offer_id":40234363879491,"sku":"9707","price":38100.0,"currency_code":"JPY","in_stock":true},{"title":"SEMI M62-1111 - Superseded","offer_id":40234363945027,"sku":"9714","price":38100.0,"currency_code":"JPY","in_stock":true},{"title":"SEMI M62-0309 - Superseded","offer_id":40234363977795,"sku":"9701","price":38100.0,"currency_code":"JPY","in_stock":true}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/0567\/3402\/3747\/files\/MVolume_9c872755-1bfd-43c6-b69e-05d2ab337ac3.png?v=1776702035","url":"https:\/\/store-dev2.semi.org\/en-jp\/products\/m06200-semi-m62-%e3%82%b7%e3%83%aa%e3%82%b3%e3%83%b3%e3%82%a8%e3%83%94%e3%82%bf%e3%82%ad%e3%82%b7%e3%83%a3%e3%83%ab%e3%82%a6%e3%82%a7%e3%83%bc%e3%83%8f%e3%81%ae%e4%bb%95%e6%a7%98","provider":"SEMI Dev 2","version":"1.0","type":"link"}