{"product_id":"m01700-semi-m17-guide-for-a-universal-wafer-grid","title":"M01700 - SEMI M17 - Guide for a Universal Wafer Grid","description":"\u003cp dir=\"ltr\" align=\"justify\"\u003e\u003cbr\u003e\u003c\/p\u003e\u003cp dir=\"ltr\" align=\"justify\"\u003e\u003c\/p\u003e\u003cp class=\"MsoNormal\"\u003e\u003cspan style=\"font-size:10.0pt;line-height:107%;mso-bidi-font-family:\nCalibri;mso-bidi-theme-font:minor-latin\"\u003eMaximum allowable slip and other non-uniformly\ndistributed defects are frequently specified when procuring polished and\nepitaxial silicon wafers. SEMI M62 specifies a maximum allowable fraction of\nthe epitaxial wafer surface area that can contain slip.\u003co:p\u003e\u003c\/o:p\u003e\u003c\/span\u003e\u003c\/p\u003e\n\n\u003cp class=\"MsoNormal\"\u003e\u003cspan style=\"font-size:10.0pt;line-height:107%;mso-bidi-font-family:\nCalibri;mso-bidi-theme-font:minor-latin\"\u003e\u003co:p\u003e \u003c\/o:p\u003e\u003c\/span\u003e\u003c\/p\u003e\n\n\u003cp class=\"MsoNormal\"\u003e\u003cspan style=\"font-size:10.0pt;line-height:107%;mso-bidi-font-family:\nCalibri;mso-bidi-theme-font:minor-latin\"\u003eThis Guide provides a design for and\nguidance for use of a wafer grid that facilitates the determination of the\nfraction of the wafer surface area covered by observed defects.\u003co:p\u003e\u003c\/o:p\u003e\u003c\/span\u003e\u003c\/p\u003e\n\n\u003cp class=\"MsoNormal\"\u003e\u003cbr\u003e\u003c\/p\u003e\n\n\u003cp class=\"MsoNormal\"\u003e\u003cspan style=\"font-size:10.0pt;line-height:107%;mso-bidi-font-family:\nCalibri;mso-bidi-theme-font:minor-latin\"\u003eThis Guide defines a grid pattern that\nis useful for quantifying surface defects on a nominally circular semiconductor\nwafer. The grid is defined such that it contains 1000 elements of approximately\nequal area. Each grid element thus contains 0.1% of the total quality area of\nthe surface being inspected. Defects that are non-uniformly distributed (e.g.,\nslip) can be quantified in terms of the percent defective (or percent useful)\narea on the wafer surface.\u003co:p\u003e\u003c\/o:p\u003e\u003c\/span\u003e\u003c\/p\u003e\n\n\u003cp class=\"MsoNormal\"\u003e\u003cspan style=\"font-size:10.0pt;line-height:107%;mso-bidi-font-family:\nCalibri;mso-bidi-theme-font:minor-latin\"\u003e\u003co:p\u003e \u003c\/o:p\u003e\u003c\/span\u003e\u003c\/p\u003e\n\n\u003cp class=\"MsoNormal\"\u003e\u003cspan style=\"font-size:10.0pt;line-height:107%;mso-bidi-font-family:\nCalibri;mso-bidi-theme-font:minor-latin\"\u003eThe grid described is referenced to\nthe center of the wafer. A concept of a ‘fixed quality area’ is used, based on\nnominal wafer diameter, such as is specified in SEMI M1.\u003co:p\u003e\u003c\/o:p\u003e\u003c\/span\u003e\u003c\/p\u003e\n\n\u003cp class=\"MsoNormal\"\u003e\u003cspan style=\"font-size:10.0pt;line-height:107%;mso-bidi-font-family:\nCalibri;mso-bidi-theme-font:minor-latin\"\u003e\u003co:p\u003e \u003c\/o:p\u003e\u003c\/span\u003e\u003c\/p\u003e\n\n\u003cp class=\"MsoNormal\"\u003e\u003cspan style=\"font-size:10.0pt;line-height:107%;mso-bidi-font-family:\nCalibri;mso-bidi-theme-font:minor-latin\"\u003e\u003cb\u003eReferenced SEMI Standards\u003c\/b\u003e (purchase\nseparately)\u003co:p\u003e\u003c\/o:p\u003e\u003c\/span\u003e\u003c\/p\u003e\n\n\u003cp class=\"MsoNormal\"\u003e\u003cspan style=\"font-size:10.0pt;line-height:107%;mso-bidi-font-family:\nCalibri;mso-bidi-theme-font:minor-latin\"\u003eSEMI M1 — Specification for Polished Single\nCrystal Silicon Wafers\u003co:p\u003e\u003c\/o:p\u003e\u003c\/span\u003e\u003c\/p\u003e\n\n\u003cp class=\"MsoNormal\"\u003e\u003cspan style=\"font-size:10.0pt;line-height:107%;mso-bidi-font-family:\nCalibri;mso-bidi-theme-font:minor-latin\"\u003eSEMI M59 — Terminology for Silicon\nTechnology\u003co:p\u003e\u003c\/o:p\u003e\u003c\/span\u003e\u003c\/p\u003e\n\n\u003cp class=\"MsoNormal\"\u003e\u003cspan style=\"font-size:10.0pt;line-height:107%;mso-bidi-font-family:\nCalibri;mso-bidi-theme-font:minor-latin\"\u003eSEMI M62 — Specification for Silicon\nEpitaxial Wafers\u003co:p\u003e\u003c\/o:p\u003e\u003c\/span\u003e\u003c\/p\u003e\n\n\u003cp class=\"MsoNormal\"\u003e\u003cspan style=\"font-size:10.0pt;line-height:107%;mso-bidi-font-family:\nCalibri;mso-bidi-theme-font:minor-latin\"\u003eSEMI MF154 — Guide for Identification\nof Structures and Contaminants Seen on Specular Silicon Surfaces\u003co:p\u003e\u003c\/o:p\u003e\u003c\/span\u003e\u003c\/p\u003e\n\n\u003cp class=\"MsoNormal\"\u003e\u003cspan style=\"font-size:10.0pt;line-height:107%;mso-bidi-font-family:\nCalibri;mso-bidi-theme-font:minor-latin\"\u003eSEMI MF1725 — Practice for Analysis of\nCrystallographic Perfection of Silicon Ingots\u003co:p\u003e\u003c\/o:p\u003e\u003c\/span\u003e\u003c\/p\u003e\n\n\u003cp class=\"MsoNormal\"\u003e\u003cspan style=\"font-size:10.0pt;line-height:107%;mso-bidi-font-family:\nCalibri;mso-bidi-theme-font:minor-latin\"\u003eSEMI MF1726 — Practice for Analysis of\nCrystallographic Perfection of Silicon Wafers\u003co:p\u003e\u003c\/o:p\u003e\u003c\/span\u003e\u003c\/p\u003e\n\n\u003cp class=\"MsoNormal\"\u003e\u003cspan style=\"font-size:10.0pt;line-height:107%;mso-bidi-font-family:\nCalibri;mso-bidi-theme-font:minor-latin\"\u003eSEMI MF1809 — Guide for Selection and\nUse of Etching Solutions to Delineate Structural Defects in Silicon\u003co:p\u003e\u003c\/o:p\u003e\u003c\/span\u003e\u003c\/p\u003e\n\n\u003cp class=\"MsoNormal\"\u003e\u003cspan style=\"font-size:10.0pt;line-height:107%;mso-bidi-font-family:\nCalibri;mso-bidi-theme-font:minor-latin\"\u003e\u003co:p\u003e \u003c\/o:p\u003e\u003c\/span\u003e\u003c\/p\u003e\n\n\u003cp class=\"MsoNormal\"\u003e\u003cspan style=\"font-size:10.0pt;line-height:107%;mso-bidi-font-family:\nCalibri;mso-bidi-theme-font:minor-latin\"\u003e\u003cb\u003eRevision History\u003c\/b\u003e\u003co:p\u003e\u003c\/o:p\u003e\u003c\/span\u003e\u003c\/p\u003e\n\n\u003cp class=\"MsoNormal\"\u003e\u003cspan style=\"font-size:10.0pt;line-height:107%;mso-bidi-font-family:\nCalibri;mso-bidi-theme-font:minor-latin\"\u003eSEMI M17-1110 (Reapproved 1121)\u003co:p\u003e\u003c\/o:p\u003e\u003c\/span\u003e\u003c\/p\u003e\n\n\u003cp class=\"MsoNormal\"\u003e\u003cspan style=\"font-size:10.0pt;line-height:107%;mso-bidi-font-family:\nCalibri;mso-bidi-theme-font:minor-latin\"\u003eSEMI M17-1110 (Reapproved 1015)\u003co:p\u003e\u003c\/o:p\u003e\u003c\/span\u003e\u003c\/p\u003e\n\n\u003cp class=\"MsoNormal\"\u003e\u003cspan style=\"font-size:10.0pt;line-height:107%;mso-bidi-font-family:\nCalibri;mso-bidi-theme-font:minor-latin\"\u003eSEMI M17-1110 (technical revision)\u003co:p\u003e\u003c\/o:p\u003e\u003c\/span\u003e\u003c\/p\u003e\n\n\u003cp class=\"MsoNormal\"\u003e\u003cspan style=\"font-size:10.0pt;line-height:107%;mso-bidi-font-family:\nCalibri;mso-bidi-theme-font:minor-latin\"\u003eSEMI M17-0704 (technical revision)\u003co:p\u003e\u003c\/o:p\u003e\u003c\/span\u003e\u003c\/p\u003e\n\n\u003cp class=\"MsoNormal\"\u003e\u003cspan style=\"font-size:10.0pt;line-height:107%;mso-bidi-font-family:\nCalibri;mso-bidi-theme-font:minor-latin\"\u003eSEMI M17-0998 (technical revision)\u003co:p\u003e\u003c\/o:p\u003e\u003c\/span\u003e\u003c\/p\u003e\n\n\u003cp class=\"MsoNormal\"\u003e\u003cspan style=\"font-size:10.0pt;line-height:107%;mso-bidi-font-family:\nCalibri;mso-bidi-theme-font:minor-latin\"\u003eSEMI M17-90 (first published)\u003c\/span\u003e\u003c\/p\u003e","brand":"semi.org","offers":[{"title":"SEMI M17-1110 (Reapproved 1121) - Current","offer_id":40234288054339,"sku":"14757","price":31900.0,"currency_code":"JPY","in_stock":true},{"title":"SEMI M17-1110 (Reapproved 1015) - Superseded","offer_id":40234288185411,"sku":"4839","price":31900.0,"currency_code":"JPY","in_stock":true},{"title":"SEMI M17-1110 - Superseded","offer_id":40234288316483,"sku":"9510","price":31900.0,"currency_code":"JPY","in_stock":true},{"title":"SEMI M17-0704 - Superseded","offer_id":40234288447555,"sku":"9508","price":31900.0,"currency_code":"JPY","in_stock":true}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/0567\/3402\/3747\/files\/MVolume_7432736c-a72c-443c-b367-7388c3cc72ce.png?v=1776702629","url":"https:\/\/store-dev2.semi.org\/en-jp\/products\/m01700-semi-m17-guide-for-a-universal-wafer-grid","provider":"SEMI Dev 2","version":"1.0","type":"link"}